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Logic level
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#	Item
121	Journal of Instruction-Level Parallelism Vol. 3 Submitted[removed]; Published 2002 The Design of DEETM: a Framework for Dynamic Energy Efficiency and Temperature Management Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2002-04-12 01:25:15 Theoretical computer science Computing Parallel computing Heat transfer Mathematical optimization Multi-core processor Mathematics Applied mathematics Operations research Algorithm Mathematical logic
122	® SP200[removed][removed] +5V High–Speed RS-232 Transceivers with 0.1µF Capacitors ■ Add to Reading List Source URL: optimus.meleeisland.net Language: English Charge pump Pinout Capacitor IC power supply pin Logic level Power supply 5V Technology Electromagnetism Electrical engineering Integrated circuits
123	Philips Semiconductors Product specification TrenchMOS transistor Logic level FET Add to Reading List Source URL: www.nxp.com Language: English - Date: 2011-06-30 08:36:14 Integrated circuits Digital electronics Electronic design Depletion and enhancement modes Transistor Threshold voltage Field-effect transistor IC power supply pin Transconductance Electronic engineering Electrical engineering Electromagnetism
124	Interservice/Industry Training, Simulation, and Education Conference (I/ITSEC[removed]Simulation Development and Authoring: Why Abstraction Matters Dr. Sowmya Ramachandran, Randy Jensen, Erik Sincoff Stottler Henke Associ Add to Reading List Source URL: www.stottlerhenke.com Language: English - Date: 2010-09-23 13:45:15 Simulation software Business software Management education Operations research Simulation Training simulation Logic simulation Aggregate Level Simulation Protocol Business simulation Business Electronic engineering Learning
125	SOS 2005 Preliminary Version A Compositional Natural Semantics and Hoare Logic for Low-Level Languages Ando Saabas and Tarmo Uustalu 1,2 Institute of Cybernetics at Tallinn University of Technology Add to Reading List Source URL: set.ee Language: English - Date: 2005-11-01 12:39:40 Metalogic Universal algebra Formal languages Structure Interpretation Parity of a permutation Substructure Hoare logic Goto Mathematics Model theory Mathematical logic
126	Functional Testing Functional Testing Objectives: This section explains: Add to Reading List Source URL: www.soft-test.com Language: English - Date: 2013-05-02 03:39:00 Electromagnetism Electronic design automation Electronic test equipment Electronic design Flip-flop Comparator Logic level In-circuit functional tester Automatic test pattern generation Electronic engineering Electronics Digital electronics
127	A Compositional Natural Semantics and Hoare Logic for Low-Level Languages 1 Ando Saabas 2 and Tarmo Uustalu ∗,2 Institute of Cybernetics at Tallinn University of Technology Akadeemia tee 21, EE[removed]Tallinn, Estonia R Add to Reading List Source URL: set.ee Language: English - Date: 2007-12-06 06:22:33 Logic Mathematical logic Structure Universal algebra Interpretation Hoare logic Parity of a permutation Goto Denotational semantics Mathematics Model theory Formal languages
128	Compositional Type Systems for Stack-Based Low-Level Languages Ando Saabas Tarmo Uustalu Institute of Cybernetics at Tallinn University of Technology Add to Reading List Source URL: set.ee Language: English - Date: 2006-10-30 06:58:01 Philosophy of language Philosophy of mind Semantics Entailment Zeta Symbol Logic Interpretation Model theory
129	Freescale Semiconductor Technical Data Document Number: MC33887 Rev. 16.0, [removed] Add to Reading List Source URL: cache.freescale.com Language: English - Date: 2012-10-11 13:27:28 Electromagnetism Integrated circuits Logic families Electronic circuits Open collector Logic level Pull-up resistor CMOS MOSFET Electronic engineering Digital electronics Electronics

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